Design for Globalization
Fig. 2. DfG Key Elements
1. Customer: Gov, Commerce, U-Ed:
Provides Requirements and works with Top-Level Designer to develop Design Specifications using High-level Modeling Tools (e.g. MatLab / Simulink)
2. Design Environment Top-level design based on: Quality, Trust,
3. IEEE Standards
IEEE Interfaces (e.g IEEE 1500) and IEEE Defined Test Bench Standards included in the MDVEO Repository
4. Collaborative Engineering
Partitioning of the tasks among various participants
5. Design Tools: UML, SystemC, ,MatLab, Simulink, VHDL
Hardware and Software Detailed Designs (e.g. Xilinx System Generator, Xilinx ISE)
6. Trusted IP Cores Repository
Various Levels of Verification and Trust Fee-based Available from Repository
7. Design Space Exploration and Optimization Tools
8. Test Tools: Intellitech (SystemBIST)
HW/ SW Co-Simulation and Hardware-in-the-Loop Co-Simulation
9. Sophisticated Test Instrumentation
Including Hardware-in-the-Loop with external sensors and actuators
10. ASIC/VLSI: MOSIS, EuroChip
Traditional path for implementation of design through ASICs fabricated by MOSIS or other fabrication facilities
11. FPGA: Altera, Xilinx
Alternative path for implementation using FPGA target platforms
12. MultiCore: Intel, AMD, IBM
Future implementation path using customizable and potentially programmable homogenous and heterogeneous Multicore processors such as Intel Terascale [8]
13. Global Ambient Intelligent Network
Path for implementation beyond a single chip as part of a network of SoCs
14. Security Initiative
Prime application for the resultant Highly Trusted SoC or Constellation of SoCs for Critical Infrastructure, Homeland Security and Defense Technology Applications
15. World Wide Web-based MDVEO Design for Globalization Environment
Servers for the various functions of the DfG interconnected through web-based Service Oriented Architecture ("SOA")
16. Remote PC host
Provides the human-centric User Interface to the DfG and the local-host functions to support the